A low-power management technique for high-performance domino circuits | NobleID

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A low-power management technique for high-performance domino circuits

NobleID: NI9P94W20R81S00
Persistent link: https://nobleid.org/ark:/48914/w1/20260515/150522BA

Type:Conference Paper

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Cheng-Chili Tsai

Ching-Hwa Cheng

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