Main

Mint Work Search Explore Works Knowledge Graph Citation Graph Bibliometrics Receipts

v1

Implementation of MELP Encoder on Zynq FPGA using HLS

Identifier:nobleid.org/w1/20260515/4B6599BA

Type:Conference Paper

0 views

Support unavailableClaim Your Authorship

View Original Paper Source

Embeddable Badge

[![NobleID](https://www.nobleid.org/api/badge/4B6599BA.svg?ark=w1%2F20260515%2F4B6599BA)](https://nobleid.org/work/w1/20260515/4B6599BA)

ARK Inflections

Metadata Policy

Metadata Formats

Bibliometric Analysis

Impact metrics, research fronts, co-authorship networks →

Authors & Claims

Paper Authors

Shashidhar Shivanagi

Claim authorship of this work

info@nobleid.org

About FAQ Terms Policy Persistence & Resolver Service Policy

Implementation of MELP Encoder on Zynq FPGA using HLS | NobleID