Designing a 90nm CMOS OR Gate using Artificial Neural Networks (ANNs) | NobleID

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Designing a 90nm CMOS OR Gate using Artificial Neural Networks (ANNs)

Identifier:nobleid.org/w1/20260515/6917EBEE

Type:Journal Article

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Jithendra Pulivarthi

Tammina Yasawini

Saipriya Nallamadugu

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